The electrically-conductive interconnect layers of modern integrated circuits are generally of very fine pitch and high density. A single, small defect in the precursor metal film which ultimately forms a metallic interconnect layer of an integrated circuit can be so positioned as to seriously damage the operational integrity of the integrated circuit.
Bit line stack deposition suffers from a number of potential issues. Surface reaction of the metal and silicon nitride hardmask can occur due to high deposition temperatures experienced in the formation of the hardmask. The bit line resistance can increase due to inter-diffusion of silicon into the bit line and metal atoms into the silicon nitride hardmask. Additionally, grain growth metals can be difficult to use due to metal surface roughness caused by high temperature silicon nitride hardmask formation.
Therefore, there is a need in the art for bit line stacks and/or methods of forming bit lines with lower resistivity.